Depth-Efficient Threshold Circuits for Multiplication and Symmetric Function Computation

The multiplication operation and the computation of symmetric functions are fundamental problems in arithmetic and algebraic computation. We describe unit-weight threshold circuits to perform the multiplication of two n-bit integers, which have fan-in k, edge complexity O(n 2+1=d), and depth O(log d + log n= log k), for any xed integer d > 0. For a given fan-in, our constructions have considerably smaller depth (or edge complexity) than the best previous circuits of similar edge complexity (or depth, respectively). Similar results are also shown for the iterated addition operation and the computation of symmetric functions. In particular, we propose a unit-weight threshold circuit to compute the sum of m n-bit numbers that has fan-in k, edge complexity O(nm 1+1=d), and depth O(log d + log m= log k + log n= log k).